Re: Quick Ram Question.?
lower timings usally means quicker ram
heres an articale that goes in deph
CAS (tCL) Timing: CAS stands for Column Address Strobe or Column Address Select. It controls the amount of time in cycles between sending a reading command and the time to act on it. From the beginning of the CAS to the end of the CAS is the latency. The lower the time of these in cycles, the higher the memory performance.
e.g.: 2.5-3-3-8 The bold “2.5” is the CAS timing.
tRCD Timing: RAS to CAS Delay (Row Address Strobe/Select to Column Address Strobe/Select). Is the amount of time in cycles for issuing an active command and the read/write commands.
e.g.: 2.5-3-3-8 The bold “3” is the tRCD timing.
tRP Timing: Row Precharge Time. This is the minimum time between active commands and the read/writes of the next bank on the memory module.
e.g.: 2.5-3-3-8 The bold “3” is the tRP timing.
tRAS Timing: Min RAS Active Time. The amount of time between a row being activated by precharge and deactivated. A row cannot be deactivated until tRAS has completed. The lower this is, the faster the performance, but if it is set too low, it can cause data corruption by deactivating the row too soon.
tRAS = tCL + tRCD + tRP (+/- 1) so that it gives everything enought time before closing the bank.
e.g.: 2.5-3-3-8 The bold “8” is the tRAS timing.
(The 2.5-3-3-8 figure is just an example for memory timings.)
These are the four timings that you would see when memory is being rated. It is in the order of CAS-tRCD-tRP-tRAS. The lower these timings, the higher the performance of the memory. Some motherboard manufactors (DFI for example) list the timings in their bios CAS-tRCD-tRAS-tRP.
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