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Old 11-03-2011, 12:29 PM   #1
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Default CPU Question.

Hi, I am studying CPU's.

I understand the difference between a synchronous circuit and a asynchronous circuit. A synchronous circuit is in which the parts are synchronized by a clock signal, whereas a asynchronized is not.

I have read that asynchronized circuits do not offer a very practical memory because it changes whenever the R or the S input is pulsed. My question is why is this memory not practical, whats wrong with asynchronized circuits, why are synchronized circuits better?

Thanks
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Old 11-03-2011, 02:48 PM   #2
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Default Re: CPU Question.

It's all a manner of usage.

Synchronized circuits require an external clock. Async, on the other hand, use the incoming signal to clock itself. When storing multiple bits in an array, then you usually want to have synchronized storage so that you can write and read a number of bits simultaneously (say a byte or four), which requires synchronized action.

Async circuits are good for high-speed serial data transmission, but when using parallel data you need everything synchronized.
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Old 11-03-2011, 08:08 PM   #3
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Default Re: CPU Question.

With async circuits is the memory lost after the circuit is pulsed?

Or is it still in the async circuit?
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Old 11-04-2011, 07:48 AM   #4
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Default Re: CPU Question.

When the input to an async memory cell is pulsed, then the memory state changes. You can change the input to a clocked memory cell all day long and it won't change until a clocking pulse is applied to the CK line.
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Old 11-04-2011, 07:57 AM   #5
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Default Re: CPU Question.

Thank you.
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Old 11-04-2011, 11:21 AM   #6
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Default Re: CPU Question.

AGAIN, i have another question

D type flip flops...

I know a D type flip flop is a circuit with only one input. I now trying to understand how the rising/faling edge pulse works with this. With a D type flip flop it gives out a signal on a rising edge of a clock pulse, and a falling edge of a clock pulse right? But what signal does it give out on each edge of a pulse. I think I know but I wanted to check here...

One a rising clock pulse the pulse inputted to the circuit is 1, and on the falling clock pulse the pulse inputted to the circuit is a 1 also, effectively making the operations of the circuit faster, as it uses one signal twice, I think?
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Old 11-04-2011, 08:29 PM   #7
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Default Re: CPU Question.

A D-type only changes state with the rising edge of the clock. It is called a delay flip flop because the output reflects the input on the rising edge of the clock, so that the input data is essentially delayed by a clock cycle at the output of the D flip flop.

There are active low clocking d-types, and they will only change on the falling edge. But D-types will only clock on one edge or the other, not both.

Here is a quick-and-dirty on Flip Flops.
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Old 11-05-2011, 02:34 PM   #8
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Default Re: CPU Question.

thanks for the help.
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