It could have to do with that Admira, but it's also some because of the new architecture. I don't have the whole thing memorized, but one part that stood out to me was the quicker communication with memory. Before, information had to travel from the CPU to the northbridge, where the memory controller was located, then to the actual memory. Now, the memory controller is integrated to the CPU, so it only has to go to the memory. Quicker.
The new QPI bus is also faster than it's FSB counterpart. And lastly, the shared L3 cache.
Here's a more in-depth read
I haven't read the whole article yet, but it will tell you what you need to know.